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FPGA Frontrunner Meet & Greet

TechNES is pleased to announce the next FPGA Front Runners event – to he hosted by Rolls Royce at their Engine Controls facility in Solihull on October 19th .

The FPGA Front runners is all about bringing together the UK FPGA & ASIC design communities to discuss all things gate array. Share knowledge, find out what is going on and network with like minded people.

This event brings something new to the group, hosted at a member site, and allowing us more space for networking. There will be a mini expo with members promoting their products and services to the group.

We are also inviting students from across the UK to the event, to bring them closer to the community, for them to understand about the world of FPGAs and meet our members who are actively seeking graduates.

A factory tour will be arranged for the students, there maybe some extra places available – so when registering, please list your interest in a site tour.

Speakers will be announced nearer the time.

Everyone is welcome, come along and get involved in what is becoming a vibrant UK community for FPGA & ASIC design engineers.

Speakers

Dave Sanders, Rolls-Royce

Dave Sanders is an Associate Fellow at Rolls-Royce specialising in the development of complex electronic hardware. He has 25 years’ experience working in the electronics industry, with 22 of those developing the safety critical microprocessors that form the heart of the Rolls-Royce control systems for both aerospace and non-aerospace applications.

Dave is a member of the European DO254 Users Group since 2012 and has contributed to various regulation working groups including co-authoring AMC 20-152A. He became a Fellow of the IET in 2018 and was awarded the Rolls-Royce Controls Gold Innovation Award in 2015 in recognition of the successful development of the sixth-generation safety critical microprocessor, which has already accumulated over 20 million fault free flying hours.

In his spare time, Dave is a keen runner and currently men’s captain for Lichfield running club.

Harald Werner, Efinix Inc.

Harald Werner has over 30 years’ experience in the electronic industry.

He received an Dipl.- Ing (FH) at the FH Koblenz.

He started his career in 1987 at Siemens AG, in 1992 he joined the EDA industry at Viewlogic Systems in 1995 he started the career in the semiconductor industry at Actel, following in 2000 with Lattice Semiconductor and since 2020 he joined Efinix Inc. as European Sales Director.

Adam Taylor, Adiuvo Engineering & Training Ltd

Adam Taylor is a world recognised expert in design and development of embedded systems and FPGA’s for several end applications. Throughout his career, Adam has used FPGA’s to implement a wide variety of solutions from RADAR to safety critical control systems (SIL4) and satellite systems. He also had interesting stops in image processing and cryptography along the way. Adam has held executive positions, leading large developments for several major multinational companies.

For many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging, being responsible for several game changing projects.
Adam has held executive positions, leading large developments for several major multinational companies. For many years Adam held significant roles in the space industry he was a Design Authority at Astrium Satellites (Now Airbus Space) Payload processing group for six years and for three years he was the Chief Engineer of e2v Space Imaging, being responsible for several game changing projects.

FPGAs are Adam ‘s first love, he is the author of numerous articles and papers on electronic design and FPGA design including over 400 blogs and 25 million plus views on how to use the Zynq and Zynq MPSoC for Xilinx.
Adam is Chartered Engineer, Senior Member of the IEEE, Fellow of the Institute of Engineering and Technology, Visiting Professor of Embedded Systems at the University of Lincoln and Arm Innovator, Edge Impulse Ambassador, he is also the owner of the engineering and consultancy company Adiuvo Engineering and Training

Amanda Brock, OpenUK

Amanda Brock is CEO of OpenUK, the UK organisation for the business of Open Technology in the UK – open source software, open hardware and open data – with a purpose of UK Leadership and International Collaboration in Open Technology.

She is a Board Member of the Open Source Initiative; appointed member of the Cabinet Office’s Open Standards Board; Member of the British Computer Society Inaugural Influence Board; Advisory Board Member, KDE, Planet Crust, Sustainable Digital Infrastructure Alliance and Mimoto; Charity Trustee Creative Crieff and GeekZone; and European Representative of the Open Invention Network.

A lawyer of 25 years’ experience, she previously chaired the Open Source and IP Advisory Group of the United Nations Technology Innovation Labs, sat on the OASIS Open Projects and UK Government Energy Sector Digitalisation Task Force. Advisory Boards. She was General Counsel of Canonical for 5 years from 2008 and set up their legal function.

Amanda was awarded the UK Lifetime Achievement Award in the Women, Influence & Power in Law Awards 2022, and included in Computer Weekly’s Most Influential Women in Tech Long list in 2021 and 2022 and in their UK Tech50 Influencers longlist for 2022.

She is the editor of Open Source, Law, Policy and Practice second edition being published by Oxford University Press in October 2022 and with open access thanks to the Vietsch Foundation.

linkedin.com/in/amandabrocktech/
@openuk_uk @amandabrockUK

Andy Darlington, Renishaw

Andy is a senior design engineer working within Renishaw’s encoder division on new product development.

He specialises in FPGA and VHDL with a particular interest in improving our team’s development processes.

Presentation Title:  Applying Continuous Integration to VHDL Development

Using VUnit and Azure DevOps to apply continuous integration and continuous delivery practices to VHDL development.

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