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FPGA Frontrunner Meet and Greet
November 27, 2023 @ 10:00 am - 2:30 pm
FPGA Frontrunner Meet & Greet
Security at System Level, and what security features we need in our FPGA to support this
The FPGA Front Runners event will be hosted by Thales at their venue in Reading.
The event will focus on “Security at System Level, and what security features we need in our FPGA to support this”.
If you are interested in speaking at this event please email [email protected]
Topics for talks:
- What is Security in FPGA-based Systems?
- What security features do we need our FPGAs to support this?
- Example applications and the implications for security
- (this is NOT supply-chain security)
Agenda:
| 10:00 | Registration, arrival and refreshments |
| 10.30 | Peter Davies, Thales – “Security in FPGA-based Systems” |
| 11:00 | Mark Frost, Intel – “Security in FPGA” |
| 11:20 | Ian Pearson, Microchip – “System and Device Level Security Considerations” |
| 11:40 | Maximilian Werner, Efinix Inc – “Efinix FPGA Encryption solution” |
| 12:00 | Fabio Caccamo & Chris Palmer from AMD |
| 12:30 | Simon Bowles, Product Cyber Security Specialist, Rolls Royce – “RR’s product security goals and the context in which we use FPGAs” |
| 12:45 | Ankith Srinivasan, Cirrus Rays Pvt Ltd – “Physically Unclonable Functions (PUFs) in FPGA security” |
| 13:00 | Working lunch in small groups – “FPGA use models and possible security concerns” |
| 14:00 | Presentations by each group |
| 14:30 | Finish refreshments/networking |
- Registration on the day via Thales’s front desk
- Parking available – car registration needed