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Past Event
Ongoing
Cadence TECHTALK Series: Adopting a Faster, More Efficient Path to Multi-Chiplet Design
Webinar with dates running between 23rd February and 6th April With the increasing popularity of multi-chiplet designs that address Moore’s law slowdown and reticle size limitations, leading foundries are offering multiple advanced packaging and die stacking options for different applications.
FPGA Frontrunner Meet & Greet
NMI is all about sharing knowledge and creating communities. The FPGA Front Runners exists to share knowledge, best practice and to create a community around FPGAs and ASIC development.